VG-330 White Paper: "Data Transfers in X86 Architectures:
DMA and Programmed I/O"
most common and popular mechanisms of transferring large blocks
of data between memory and I/O ports are Direct Memory Access
(DMA) and Programmed I/O (PIO). DMA
is a method of transferring data without CPU intervention.
By contrast, the PIO method uses the CPU for data transfers.
offers the VG-330 single-chip platform for embedded, handheld,
and Internet applications. The VG-330 is based on the NEC V30MX
8086-compatible microprocessor. It is a highly-integrated
solution targeted for low power, high performance systems.
The VG-330 is targeted specifically towards 3.3 V systems requiring
increased processing power but requiring longer battery life
than less integrated solutions.
techniques used for data transfers in an 8086-based system
are DMA and PIO. In systems where DMA is integrated, software
developers have the option to employ either technique when
paper discusses the relative merits of DMA and PIO. It suggests
that for the class of applications targeted by single-chip systems
such as VG-330, and given the class of such devices, DMA offers
little or no benefit for data transfer. The way DMA is implemented
varies from one computer architecture to another, so this discussion
will be limited to the DMA and PIO mechanisms based on the x86
industry standard architecture.
originally implemented using the 8237 DMA controller to facilitate
floppy and hard disk data transfer in the original IBM PCs.
DMA has traditionally dominated the following areas:
and data access simultaneously
it has been found over the years that DMA has two main drawbacks:
programmed I/O, especially in single-tasking environments,
has proven to outpace DMA in terms of data transfer speed
also been shown that using Amphus's VG-330 single-chip platform
in the PIO mode can achieve comparable or better performance
than DMA. It is suggested that PIO is more appropriate in handheld,
embedded systems where floppy drives and similar peripherals
are not typically found.
operation is based on the 8237 DMA controller. The 8237 transfers
either 8 or 16 bits of data between memory and an I/O port.
A basic theory of operation of DMA is given in the following
programs the DMA controller registers with several parameters
(for example, transfer direction and size of transfer) to
initialize the DMA channel prior to the actual DMA transfer.
After controller programming is complete, the DMA channel
is normally activated only when the hardware that uses DMA
asserts the DRQ signal to request a transfer for that channel.
When the DMA controller receives the request, it transfers
data between the memory and I/O port without CPU intervention.
The DMA controller begins by requesting the address and data
bus from the CPU. After some latency (a few microseconds,
worst case), the CPU gives up the bus and the DMA controller
executes one or more DMA transfer cycles on the bus. After
the transfer, the DMA controller returns control of the bus
to the CPU. The DMA transfer operation delays, but does not
require, interruption of the ongoing CPU instruction stream.
the following drawbacks:
The 8237 DMA controller is slow. It was originally designed
to interface with the 8085 microprocessor, and is not suited
for data transfer tasks in the original PC. In fact, the hard
disk drives that originally used DMA for data transfers now
use PIO for speed. The standard 8237 DMA controller and interface
supports a data transfer rate of approximately 1 MB/sec. Another
data transfer method is fast DMA. Amphus has chosen not to
implement DMA in the VG-330 because of the cost sensitivity
of handheld and embedded system devices.
Channel Set Up. Initializing the DMA channel can create a large
overhead. Several registers have to be programmed before the
data transfer can take place. Also, in systems like DOS that
reprogram the DMA channel after each block transfer, the overhead
is even greater.
or Polled I/O transfers are done using the CPU. In Polled I/O
mode, the CPU first checks to see if the I/O port needing a
data transfer has the data ready. If so, the data is transferred
to the memory. I/O ports that have buffered data use the programmed
I/O (PIO) transfer method. If a block of data is ready, the
CPU transfers the data using repeat string instructions. It
does not have to check to see if the I/O device is ready to
receive or send each individual byte of data. PIO can achieve
speeds of about 2 MB/sec on the ISA bus.
Programmed I/O to Replace DMA
the DMA data transfer method has been used for the following
and data access simultaneously
I/O data transfer on the VG-330 single-chip platform achieves
traditional DMA performance as explained in the following
a short latency is required, DMA is normally used. However,
maskable interrupts (such as that used for DMA transfers)
introduce too much worst case latency, due to the multiplicity
of sources and the ability of any program to mask off interrupts
temporarily. On the VG-330, however, the latency issue can
be reduced with polled I/O or non-maskable interrupt (NMI)
techniques. The polled I/O method checks the status of a device
with a very tight loop of instructions and transfers data
when the device is ready. The VG-330 services NMIs within 10
microseconds worst case. The interrupt routine itself introduces
an overhead of 10 to 20 microseconds, for a total latency
of 20 to 30 microseconds. Depending on the system configuration,
polled I/O can respond within 5 to 10 microseconds.
the polled I/O or NMI techniques can meet the needs of modern
high-speed buffered peripherals.
and Data Access Simultaneously
though a CPU can potentially do some useful work while the
DMA controller is busy transferring data, the 8237 consumes
excessive bus bandwidth due to its long DMA cycles. The bus
bandwidth available to the CPU is substantially reduced because
the long 8237 bus cycles crowd out the short CPU bus cycles.
that Amphus has successfully ported a real time kernel and
is able to run Internet applications on the VG-330 using PIO
supports the fact that PIO competes very favorably with DMA
for data transfer.
first introduced in the IBM PC to transfer data to and from
floppy disks. Later, DMA was used in the IBM PC/XT to accomplish
hard disk data transfers. Since then, due to higher-speed hard
disk drives, PIO has been used for hard disk data transfers.
Most hand held systems still use single-tasking environments
in which the CPU stays idle even if data is transferred using
DMA. Hence, in single-tasking environments like DOS, programmed
or polled I/O provides a higher transfer rate than DMA. The
existing software is old and software developers have recognized
the benefit of programmed I/O. Therefore it is not necessary
to have the overhead of DMA in silicon. In the past, DMA has
been used for floppy operation and at times used for bar code
readers-these operations can be done effectively now using PIO.
potential performance improvements over DMA. Even in places
where DMA has traditionally been used, programmed I/O can be
used effectively. The VG-330 runs at 32 MHz, which allows instructions
to be executed extremely fast, allowing PIO data transfers to
improve the performance of the system. Amphus has chosen not
to implement DMA because the VG-330 is intended for low-cost
handheld systems where implementation of DMA would be an expensive
solution without any benefit. The VG-330 evaluation board supports
a 1.44 MB floppy drive, using PIO for data transfers.
Copyright 1996 Amphus. All Rights Reserved
Information furnished by Amphus is believed to be accurate and
reliable. However, no responsibility is assumed by Amphus for
its use; nor for any infringements of patents or other rights
of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent
rights of Amphus. Amphus reserves the right to change specifications
at any time without notice. Trademarks mentioned herein belong
to their respective companies. Medical Disclaimer: Amphus's
products are not authorized for use in life support devices
or systems or in any medical applications and cannot be used
in such applications without the written consent of the President
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